mirror of
https://github.com/musix-org/musix-oss
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104 lines
3.4 KiB
C
104 lines
3.4 KiB
C
/***********************************************************************
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Copyright (C) 2013 Xiph.Org Foundation and contributors.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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- Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name of Internet Society, IETF or IETF Trust, nor the
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names of specific contributors, may be used to endorse or promote
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products derived from this software without specific prior written
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permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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***********************************************************************/
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#ifndef SILK_MACROS_ARMv4_H
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#define SILK_MACROS_ARMv4_H
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/* (a32 * (opus_int32)((opus_int16)(b32))) >> 16 output have to be 32bit int */
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#undef silk_SMULWB
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static OPUS_INLINE opus_int32 silk_SMULWB_armv4(opus_int32 a, opus_int16 b)
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{
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unsigned rd_lo;
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int rd_hi;
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__asm__(
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"#silk_SMULWB\n\t"
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"smull %0, %1, %2, %3\n\t"
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: "=&r"(rd_lo), "=&r"(rd_hi)
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: "%r"(a), "r"(b<<16)
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);
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return rd_hi;
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}
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#define silk_SMULWB(a, b) (silk_SMULWB_armv4(a, b))
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/* a32 + (b32 * (opus_int32)((opus_int16)(c32))) >> 16 output have to be 32bit int */
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#undef silk_SMLAWB
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#define silk_SMLAWB(a, b, c) ((a) + silk_SMULWB(b, c))
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/* (a32 * (b32 >> 16)) >> 16 */
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#undef silk_SMULWT
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static OPUS_INLINE opus_int32 silk_SMULWT_armv4(opus_int32 a, opus_int32 b)
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{
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unsigned rd_lo;
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int rd_hi;
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__asm__(
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"#silk_SMULWT\n\t"
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"smull %0, %1, %2, %3\n\t"
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: "=&r"(rd_lo), "=&r"(rd_hi)
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: "%r"(a), "r"(b&~0xFFFF)
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);
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return rd_hi;
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}
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#define silk_SMULWT(a, b) (silk_SMULWT_armv4(a, b))
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/* a32 + (b32 * (c32 >> 16)) >> 16 */
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#undef silk_SMLAWT
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#define silk_SMLAWT(a, b, c) ((a) + silk_SMULWT(b, c))
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/* (a32 * b32) >> 16 */
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#undef silk_SMULWW
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static OPUS_INLINE opus_int32 silk_SMULWW_armv4(opus_int32 a, opus_int32 b)
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{
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unsigned rd_lo;
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int rd_hi;
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__asm__(
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"#silk_SMULWW\n\t"
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"smull %0, %1, %2, %3\n\t"
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: "=&r"(rd_lo), "=&r"(rd_hi)
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: "%r"(a), "r"(b)
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);
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return (rd_hi<<16)+(rd_lo>>16);
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}
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#define silk_SMULWW(a, b) (silk_SMULWW_armv4(a, b))
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#undef silk_SMLAWW
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static OPUS_INLINE opus_int32 silk_SMLAWW_armv4(opus_int32 a, opus_int32 b,
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opus_int32 c)
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{
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unsigned rd_lo;
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int rd_hi;
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__asm__(
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"#silk_SMLAWW\n\t"
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"smull %0, %1, %2, %3\n\t"
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: "=&r"(rd_lo), "=&r"(rd_hi)
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: "%r"(b), "r"(c)
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);
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return a+(rd_hi<<16)+(rd_lo>>16);
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}
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#define silk_SMLAWW(a, b, c) (silk_SMLAWW_armv4(a, b, c))
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#endif /* SILK_MACROS_ARMv4_H */
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